摘要 |
<p>PURPOSE: A 3D semiconductor device including a cache memory array to store chapter data and an operating method thereof are provided to improve the speed of a read operation by using the cache memory array. CONSTITUTION: A main memory array(MMA) includes memory cells, is three-dimensionally arranged, and stores block data. A cache memory array(CMA) includes cache cells, is second-dimensionally arranged, and store chapter data. A bit line structure(BLS) includes bit lines, is one-dimensionally arranged, and transmits page data. A bit line decoder is connected to the cache memory array through the bit line structure.</p> |