发明名称 Layout structure of non-volatile memory device
摘要 A non-volatile memory cell includes a semiconductor substrate with isolation structures formed therein and thereby transistor region and capacitor region are defined therein. A conductor is disposed over the isolation structures, the transistor region and a first-type doped well disposed in the capacitor region. The conductor includes a capacitor portion disposed over the first-type doped well, a transistor portion disposed over the transistor region, a first edge disposed over the isolation structure at a side of the transistor region, and an opposite second edge disposed over the first-type doped well. Two first ion doped wells are disposed in the transistor region and respectively at two sides of the transistor portion, and constitutes a transistor with the transistor portion. A second ion doped region is disposed in the capacitor region excluding the conductor and constitutes a capacitor with the capacitor portion.
申请公布号 US8362535(B2) 申请公布日期 2013.01.29
申请号 US20090568953 申请日期 2009.09.29
申请人 UNITED MICROELECTRONICS CORP.;SHIH HUNG-LIN;CHEN JR-BIN;YIN PEI-CHING;TSAI HUI-FANG 发明人 SHIH HUNG-LIN;CHEN JR-BIN;YIN PEI-CHING;TSAI HUI-FANG
分类号 H01L27/108;H01L29/66 主分类号 H01L27/108
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