发明名称 Soft error correction method, memory control apparatus and memory system
摘要 A soft error correction method is for a memory system having memory access controllers accessing memories for storing byte-sliced data in cycle synchronism, and a system controller receiving a memory access from an arbitrary one of MPUs and issuing a memory address to the memory access controllers. When a correctable error is detected in data read from one memory, an error address where the error was detected is held within a memory access controller, and an error notification is made to the system controller from the memory access controller. In response to the error notification, the memory access controller holds the error address from the system controller without intervention from the MPUs, and reads, corrects and rewrites the data to the error address.
申请公布号 US8365031(B2) 申请公布日期 2013.01.29
申请号 US20090573491 申请日期 2009.10.05
申请人 FUJITSU LIMITED;SUZUKI KENJI;HONDA YASUFUMI;KOGUCHI TAKASHI 发明人 SUZUKI KENJI;HONDA YASUFUMI;KOGUCHI TAKASHI
分类号 G06F11/00 主分类号 G06F11/00
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