发明名称 PROCESSING PIPELINE CONTROL
摘要 <P>PROBLEM TO BE SOLVED: To provide a data processing device capable of reducing processing bubbles in processing pipelines. <P>SOLUTION: A graphics processing unit includes a texture pipeline 6 having a first pipeline portion 18 and a second pipeline portion 20. A subject instruction within the first pipeline portion 18 is recirculated within the first pipeline portion 18 until descriptor data to be loaded from a memory by that subject instruction is stored within a shared descriptor cache. When the descriptor has been stored within the shared cache, the subject instruction is passed to the second pipeline portion 20 where further processing operations are performed, and is recirculated until the further processing operations are complete. The descriptor data is locked within the shared descriptor cache until there are no pending subject instructions within the texture pipeline 6 required for use of the descriptor data. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013016150(A) 申请公布日期 2013.01.24
申请号 JP20120094511 申请日期 2012.04.18
申请人 ARM LTD 发明人 ANDREAS DUE ENGH-HALSTEVDT;NYSTAD JOERN
分类号 G06F9/38;G06F12/08;G06F12/12 主分类号 G06F9/38
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