发明名称 |
DUAL-GATE NORMALLY-OFF NITRIDE TRANSISTORS |
摘要 |
A dual-gate normally-off nitride transistor that includes a first gate structure formed between a source electrode and a drain electrode for controlling a normally-off channel region of the dual-gate normally-off nitride transistor. A second gate structure is formed between the first gate structure and the drain electrode for modulating a normally-on channel region underneath the second gate structure. The magnitude of the threshold voltage of the second gate structure is smaller than the drain breakdown of the first gate structure for proper operation of the dual-gate normally-off nitride transistor.
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申请公布号 |
US2013020614(A1) |
申请公布日期 |
2013.01.24 |
申请号 |
US201213557414 |
申请日期 |
2012.07.25 |
申请人 |
MASSACHUSETTS INSTITUTE OF TECHNOLOGY;LU BIN;PALACIOS TOMAS |
发明人 |
LU BIN;PALACIOS TOMAS |
分类号 |
H01L29/778;H01L21/336 |
主分类号 |
H01L29/778 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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