发明名称 OSCILLATOR
摘要 <P>PROBLEM TO BE SOLVED: To provide an oscillator for easily and accurately generating a high-frequency multi-phase clock by maintaining wiring capacities of a plurality of delay invert amplifier circuits included in the oscillator in an accurately constant state. <P>SOLUTION: Delay invert amplifier circuits 101 to 105 connected in a ring shape are disposed in a linearly arranged layout, and wires are all arranged in a same wiring length. Those which are in the same length are: wiring length between an output terminal of the delay invert amplifier circuit 102 and an input terminal of the delay invert amplifier circuit 103; wiring length between an output terminal of the delay invert amplifier circuit 103 and an input terminal of the delay invert amplifier circuit 104; wiring length between an output terminal of the delay invert amplifier circuit 104 and an input terminal of the delay invert amplifier circuit 105; wiring length between an output terminal of the delay invert amplifier circuit 105 and an input terminal of the delay invert amplifier circuit 101; and wiring length of wires connected to the output terminals of the delay invert amplifier circuits 101 to 105. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013017119(A) 申请公布日期 2013.01.24
申请号 JP20110150029 申请日期 2011.07.06
申请人 ASAHI KASEI ELECTRONICS CO LTD 发明人 UEISHI JUNPEI
分类号 H03K3/03;H01L21/82;H01L21/822;H01L27/04;H03K3/354 主分类号 H03K3/03
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