发明名称 |
TRANSMITTER, RECEIVER, SERIAL COMMUNICATION APPARATUS, AND RECORDER HAVING THE SAME |
摘要 |
<P>PROBLEM TO BE SOLVED: To solve the following problem: A reception error occurs when a cycle of a transmission clock varies from a cycle of a sampling clock corresponding to one bit on the reception side. <P>SOLUTION: A sampling clock is resynchronized each time sampling data is reversed in a reception data string. When the same data is continued by a predetermined number, a reversed dummy bit is inserted for resynchronization. <P>COPYRIGHT: (C)2013,JPO&INPIT |
申请公布号 |
JP2013017162(A) |
申请公布日期 |
2013.01.24 |
申请号 |
JP20120127536 |
申请日期 |
2012.06.04 |
申请人 |
CANON INC |
发明人 |
ONO TAKASHI |
分类号 |
H04L7/04;B41J29/38;H04L25/40 |
主分类号 |
H04L7/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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