| 摘要 |
An SRAM array includes resistive loads. These loads are made from resistance sheets formed over polysilicon rails which have vertically extending sidewalls relative to the substrate. The polysilicon rails form vertical area enhancing structures over which the resistance sheets are formed. The resistance sheets include substantially vertical components and substantially horizontal components. The resistance sheets are patterned to form current limiting devices within memory cells of the SRAM array. The polysilicon rails are deposited onto the substrate. Alternatively, the polysilicon rails are deposited onto a field oxide layer of the substrate. An oxide layer is then formed over the polysilicon rails. A second polysilicon layer is formed over the oxide layer, thereby forming the resistance sheet. The resistance sheet has a greater effective length, including the length of the vertical and horizontal components, than the length within which the resistance sheet is contained. Due to this greater effective length, the resistance sheet has a greater L/W ratio, than a conventional resistance sheet within the same area, thereby achieving a greater resistive value for the current limiting devices without increasing the overall dimensions of the SRAM array.
|
