Method, architecture and circuit for writing to a memory

摘要

A circuit and method comprising a memory, a first latch, a second latch and a control circuit. The memory may be configured to write information in response to (i) an input data signal and (ii) an address signal. The first latch may be configured to hold the address in response to a control signal. The second latch may be configured to hold the data input signal in response to the control signal. The control circuit may be configured to present the control signal in response to (i) a detect signal and (ii) a transition of the address signal.