METHOD FOR SUPPRESSING SHORT CHANNEL EFFECT OF CMOS DEVICE

摘要

A method for manufacturing a gate-last high-K CMOS structure comprising a first transistor and a second transistor, which is formed in a Si substrate includes: implanting acceptor impurity into a gate recess of the first transistor to form a first buried-layer heavily doping region under a channel of the first transistor; and implanting donor impurity into a gate recess of the second transistor to form a second buried-layer heavily doping region under a channel of the second transistor.