发明名称 Recessed Wire Bonded Semiconductor Package Substrate
摘要 A semiconductor package substrate (320) including a plurality of dielectric layers (424) and a plurality of metal layers (422), wherein the metal layers (422) further include a first metal layer (440) and at least one underlying metal layer (442), and wherein the underlying metal layer (442) is configured for a di rect interconnection with a semiconductor die (410). Preferably, the top metal layer (440) includes a ground plane. An underlying metal layer (442) comprises the signal layer, which is preferably bonded to the die by a plurality of bond wires (452). <IMAGE>
申请公布号 EP1460687(A1) 申请公布日期 2004.09.22
申请号 EP20040101124 申请日期 2004.03.18
申请人 TEXAS INSTRUMENTS INC. 发明人 HORTALEZA, EDGARDO R.;HOWARD, GREGORY E.
分类号 H01L23/12;H01L23/00;H01L23/13;H01L23/498;H01L23/66 主分类号 H01L23/12
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