发明名称 Baseband phase-locked loop
摘要 An example method includes receiving a phase correction signal representing a phase difference between a source signal and a reference signal, generating a first control voltage from the phase correction signal using a charge pump circuit, generating a second control voltage from the phase correction signal in response to a digitally filtered version of the phase correction signal, wherein the second control voltage corrects for an offset error present in the first control voltage, calculating a VCO control signal based on a linear combination of the first and the second control voltages; and generating the source signal in response to the VCO control signal.
申请公布号 US8358729(B2) 申请公布日期 2013.01.22
申请号 US20090546537 申请日期 2009.08.24
申请人 FINISAR CORPORATION;BAE HYEON MIN;SHANBHAG NARESH RAMNATH;SINGER ANDREW C. 发明人 BAE HYEON MIN;SHANBHAG NARESH RAMNATH;SINGER ANDREW C.
分类号 H03D3/24 主分类号 H03D3/24
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