发明名称 Oscillator architecture having fast response time with low current consumption and method for operating the oscillator architecture
摘要 An oscillator architecture and a method for powering up/down the oscillator architecture are described. In one embodiment, an oscillator architecture includes a reference generator configured to generate reference signals and an in-phase/quadrature (IQ) oscillator configured to generate oscillation signals based on the reference signals. The reference generator includes a distributed start-up circuitry that includes multiple start-up circuits. The IQ oscillator includes at least one turbo comparator having a low power functional mode and a turbo functional mode. Other embodiments are also described.
申请公布号 US8358175(B2) 申请公布日期 2013.01.22
申请号 US201113104361 申请日期 2011.05.10
申请人 NXP B.V.;MAHOOTI KEVIN;GANDHI SANKET;TARNG MIN MING 发明人 MAHOOTI KEVIN;GANDHI SANKET;TARNG MIN MING
分类号 H03B27/00 主分类号 H03B27/00
代理机构 代理人
主权项
地址