发明名称 Multi-level charge storage transistors and associated methods
摘要 Methods of fabricating charge storage transistors are described, along with apparatus and systems that include them. In one such method, a pillar of epitaxial silicon is formed. At least first and second charge storage nodes (e.g., floating gates) are formed around the pillar of epitaxial silicon at different levels. A control gate is formed around each of the charge storage nodes. Additional embodiments are also described.
申请公布号 US8357970(B2) 申请公布日期 2013.01.22
申请号 US20100757727 申请日期 2010.04.09
申请人 MICRON TECHNOLOGY, INC.;SANDHU GURTEJ S.;RAMASWAMY NIRMAL 发明人 SANDHU GURTEJ S.;RAMASWAMY NIRMAL
分类号 H01L29/423;H01L29/78;H01L29/788;H01L29/792 主分类号 H01L29/423
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