发明名称 High throughput and low latency map decoder
摘要 In digital communication systems forward error correction coding techniques are typically used to improve the bit error rate performance. The receiver of the digital communication systems employs a decoding apparatus which may use Maximum A posteriori Probability (MAP) algorithm and its variations such as Logarithmic-MAP (Log-MAP), Maximum-Logarithmic-MAP (Max-Log-MAP). MAP decoding apparatus is commonly used as a key component in of decoder for error correcting codes such as convolutional codes and turbo codes. The MAP decoding apparatus computes likelihood estimates as the output. The present invention performs faster MAP decoding by computing likelihood estimates in parallel.
申请公布号 US8358713(B2) 申请公布日期 2013.01.22
申请号 US20080283157 申请日期 2008.09.10
申请人 GOVINDARAJULU SARATH BABU 发明人 GOVINDARAJULU SARATH BABU
分类号 H04L23/02;H04L5/12 主分类号 H04L23/02
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