发明名称 Reducing peak currents required for precharging data lines in memory devices
摘要 A semiconductor memory storage device is disclosed. The semiconductor memory storage devices comprises: a plurality of data storage cells arranged in an array. The array comprises a plurality of columns and a plurality of rows, each column comprising at least one output line for outputting a data value from a data storage cell in a selected row of the column. Precharge circuitry for precharging the output lines to a predetermined voltage, the precharge circuitry comprising a plurality of switching devices corresponding to the plurality of columns each switching device controlled by a data output request signal and a power mode signal. The plurality of switching devices each comprising at least two switches, the at least two switches comprising a data output switch controlled by the data output request signal and a power switch controlled by the power mode signal, the plurality of switching devices connecting the output lines to the predetermined voltage in response to both the power mode signal indicating an operational mode and the data output request signal indicating data is to be output; wherein the power mode switch is configured to have a higher capacitance than the data output switch.
申请公布号 US8358551(B2) 申请公布日期 2013.01.22
申请号 US20100926965 申请日期 2010.12.20
申请人 ARM LIMITED;WIATROWSKI JACEK;KINKADE MARTIN JAY;CHONG YEW KEONG 发明人 WIATROWSKI JACEK;KINKADE MARTIN JAY;CHONG YEW KEONG
分类号 G11C7/00 主分类号 G11C7/00
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