A microelectronic package 510 can include a substrate 520 having first and second opposed surfaces 521, 527, at least two pairs of microelectronic elements 507a, 512b, and a plurality of terminals 525 exposed at the second surface. Each pair of microelectronic elements 507 can include an upper microelectronic element 530b and a lower microelectronic element 530a. The pairs of microelectronic elements 507 can be fully spaced apart from one another in a horizontal direction H parallel to the first surface 521 of the substrate 520. Each lower microelectronic element 530a can have a front surface 531 and a plurality of contacts 535 at the front surface. A surface 531 of each of the upper microelectronic elements 530b can at least partially overlie the first surface 521 of the substrate 520 and the lower microelectronic element 530a in its pair.
