| 发明名称 | Generating a pulse clock signal based on a first clock signal and a second clock signal | ||
| 摘要 | Various aspects provide for generating a clock signal for a hold latch. A latch pulse generator generates a pulse clock signal based on a first clock signal associated with a first flip-flop component and a second clock signal associated with a second flip-flop component. A hold latch component receives the pulse clock signal generated by the latch pulse generator and generates a data signal that is transmitted to the second flip-flop component. | ||
| 申请公布号 | US9385696(B1) | 申请公布日期 | 2016.07.05 |
| 申请号 | US201414497629 | 申请日期 | 2014.09.26 |
| 申请人 | APPLIED MICRO CIRCUITS CORPORATION | 发明人 | Jangity Arun |
| 分类号 | G06F1/04;H03K3/017;H03K5/05;H03K3/037 | 主分类号 | G06F1/04 |
| 代理机构 | Amin, Turocy & Watson LLP | 代理人 | Amin, Turocy & Watson LLP |
| 主权项 | 1. A system, comprising: a latch pulse generator configured for generating a pulse clock signal based on a first clock signal associated with a first flip-flop component and a second clock signal associated with a second flip-flop component; and a hold latch component configured for receiving the pulse clock signal generated by the latch pulse generator and for generating a data signal that is transmitted to the second flip-flop component. | ||
| 地址 | Santa Clara CA US | ||