发明名称 符号化装置、復号化装置及び伝送システム
摘要 An encoder including an encoder configured to perform encoding using a clock embedded encoding method, and a comparator configured to compare unencoded first and second input data, and in response to the unencoded first and second input data being identical, to output first encoded data into which the first input data is encoded by the encoder and to output, successively to the first encoded data, a special code as second encoded data into which the second input data is encoded. The special code is not stipulated in the clock embedded encoding method and exhibits a higher bit change rate than that produced according to the clock embedded encoding method.
申请公布号 JP5952072(B2) 申请公布日期 2016.07.13
申请号 JP20120100626 申请日期 2012.04.26
申请人 ルネサスエレクトロニクス株式会社 发明人 降旗 弘史;能勢 崇
分类号 H04L25/49;H03M7/14;H04L7/033 主分类号 H04L25/49
代理机构 代理人
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