Multiphase receiver with equalization circuitry

摘要

An integrated circuit device includes a first circuit to receive bits associated with a first data cycle of an electrical input signal, operable to produce a decision regarding logic state of the bits associated with the first data cycle, and a second circuit to receive bits associated with a second cycle of the electrical input signal, to produce a decision regarding logic state of the bits associated with the second data cycle. An equalizing circuit compensates for intersymbol interference affecting the second circuit dependent on an output of the first circuit and compensates for intersymbol interference affecting the first circuit dependent on an output of a circuit other than the first circuit operable to produce a decision regarding logic state of bits of the electrical input signal.