发明名称 METHOD AND APPARATUS FOR SCHEDULING OF INSTRUCTIONS IN A MULTISTRAND OUT-OF-ORDER PROCESSOR
摘要 In accordance with embodiments disclosed herein, there are provided methods, systems, and apparatuses for scheduling instructions in a multi-strand out-of-order processor. For example, an apparatus for scheduling instructions in a multi-strand out-of-order processor includes an out-of-order instruction fetch unit to retrieve a plurality of interdependent instructions for execution from a multi-strand representation of a sequential program listing; an instruction scheduling unit to schedule the execution of the plurality of interdependent instructions based at least in part on operand synchronization bits encoded within each of the plurality of interdependent instructions; and a plurality of execution units to execute at least a subset of the plurality of interdependent instructions in parallel.
申请公布号 WO2013006566(A2) 申请公布日期 2013.01.10
申请号 WO2012US45286 申请日期 2012.07.02
申请人 INTEL CORPORATION;BABAYAN, BORIS A.;PENTKOVSKI, VLADIMIR M.;BUTUZOV, ALEXANDER V.;SHISHLOV, SERGEY Y.;SIVTSOV, ALEXEY Y.;KOSAREV, NIKOLAY E 发明人 BABAYAN, BORIS A.;PENTKOVSKI, VLADIMIR M.;BUTUZOV, ALEXANDER V.;SHISHLOV, SERGEY Y.;SIVTSOV, ALEXEY Y.;KOSAREV, NIKOLAY E
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