| 摘要 |
In an absolute position detector, a relative error calculation circuit calculates, at times indicated by a clock signal C1, a relative error E between an output &thetas;2 from an absolute position detection sensor and a position output &thetas;1 from a high-resolution position detection sensor. An abnormality judgment unit judges whether the relative error E exceeds a preset abnormality judgment value. A clock switching unit outputs, as the clock signal, a high-speed clock CH having a period shorter than a noise generation period when the relative error E is judged as exceeding the preset abnormality judgment value, and outputs a slow-speed clock CL in other cases. A counter measures, based on the clock signal C1, a duration in which the abnormality detection signal AF is maintained HI, and outputs an alarm when the duration exceeds the noise generation period.
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