发明名称 |
Mitigation of well proximity effect in integrated circuits |
摘要 |
A hard implantation mask layer is formed on a semiconductor wafer. An etch mask layer is formed on the hard implantation mask layer and patterned. The hard implantation mask layer is etched to form a well implantation pattern and ions are implanted into the semiconductor wafer to form wells in the semiconductor wafer, in areas where the semiconductor wafer is not covered by the well implantation mask. |
申请公布号 |
US8350365(B1) |
申请公布日期 |
2013.01.08 |
申请号 |
US201113005680 |
申请日期 |
2011.01.13 |
申请人 |
XILINX, INC.;WU YUN;PAN HONG-TSZ;LIN QI;NGUYEN BANG-THU |
发明人 |
WU YUN;PAN HONG-TSZ;LIN QI;NGUYEN BANG-THU |
分类号 |
H01L21/4763 |
主分类号 |
H01L21/4763 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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