发明名称 High voltage LDMOS
摘要 A semiconductor device, such as a LDMOS device, comprising: a semiconductor substrate; a drain region in the semiconductor substrate; a source region in the semiconductor substrate laterally spaced from the drain region; and a drift region in the semiconductor substrate between the drain region and the source region. A gate is operatively coupled to the source region and is located offset from the drain region on a side of the source region opposite from the drain region. When the device is in an on state, current tends to flow deeper into the drift region to the offset gate, rather than near the device surface. The drift region preferably includes at least first and second stacked JFETs. The first and second stacked JFETs include first, second and third layers of a first conductivity type, a fourth layer intermediate the first and second layers including alternating pillars of the first conductivity type and of a second conductivity type extending between the source and drain regions; and a fifth layer intermediate the second and third layers, including alternating pillars of the first and second conductivity types extending between the source and drain regions.
申请公布号 US8349717(B2) 申请公布日期 2013.01.08
申请号 US20080035758 申请日期 2008.02.22
申请人 FAIRCHILD SEMICONDUCTOR CORPORATION;CAI JUN 发明人 CAI JUN
分类号 H01L21/22 主分类号 H01L21/22
代理机构 代理人
主权项
地址