发明名称 |
Dynamic squelch detection power control |
摘要 |
In one embodiment, the present invention includes power control logic for squelch detection circuitry to enable selective enabling of one or more squelch detection circuits of an interconnect interface in a low power mode. The logic may include a squelch mode control register to select a first mode or a second mode of power control, a second register coupled to the squelch mode control register to receive software settings to indicate which squelch detect circuit(s) to disable in a low power state of the interconnect, and a detector to dynamically detect a logical lane zero of the interconnect in the second mode. Other embodiments are described and claimed.
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申请公布号 |
US8352764(B2) |
申请公布日期 |
2013.01.08 |
申请号 |
US20080286188 |
申请日期 |
2008.09.29 |
申请人 |
INTEL CORPORATION;TAN SIN;RADHAKRISHNAN SIVAKUMAR;TENNANT BRUCE A.;BALRAJ JASPER;KOKER ALTUG |
发明人 |
TAN SIN;RADHAKRISHNAN SIVAKUMAR;TENNANT BRUCE A.;BALRAJ JASPER;KOKER ALTUG |
分类号 |
G06F1/32;G06F1/26 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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