发明名称 Semiconductor device and method of forming electrical interconnect with stress relief void
摘要 A semiconductor device has a semiconductor die with a plurality of tapered bumps formed over a surface of the semiconductor die. The tapered bumps can have a non-collapsible portion and collapsible portion. A plurality of conductive traces is formed over a substrate with interconnect sites. A masking layer is formed over the substrate with openings over the conductive traces. The tapered bumps are bonded to the interconnect sites so that the tapered bumps contact the mask layer and conductive traces to form a void within the opening of the mask layer over the substrate. The substrate can be non-wettable to aid with forming the void in the opening of the masking layer. The void provides thermally induced stress relief. Alternatively, the masking layer is sufficiently thin to avoid the tapered interconnect structures contacting the mask layer. An encapsulant or underfill material is deposited between the semiconductor die and substrate.
申请公布号 US8350384(B2) 申请公布日期 2013.01.08
申请号 US20100963934 申请日期 2010.12.09
申请人 STATS CHIPPAC, LTD.;PENDSE RAJENDRA D. 发明人 PENDSE RAJENDRA D.
分类号 H01L23/48;H01L21/44 主分类号 H01L23/48
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