发明名称 Process placement in a processor array
摘要 There is provided a method for placing a plurality of processes onto respective processor elements in a processor array, the method comprising (i) assigning each of the plurality of processes to a respective processor element to generate a first placement; (ii) evaluating a cost function for the first placement to determine an initial value for the cost function, the result of the evaluation of the cost function indicating the suitability of a placement, wherein the cost function comprises a bandwidth utilization of a bus interconnecting the processor elements in the processor array; (iii) reassigning one or more of the processes to respective different ones of the processor elements to generate a second placement; (iv) evaluating the cost function for the second placement to determine a modified value for the cost function; and (v) accepting or rejecting the reassignments of the one or more processes based on a comparison between the modified value and the initial value.
申请公布号 US8352955(B2) 申请公布日期 2013.01.08
申请号 US20090368836 申请日期 2009.02.10
申请人 MINDSPEED TECHNOLOGIES U.K., LIMITED;DULLER ANDREW WILLIAM GEORGE 发明人 DULLER ANDREW WILLIAM GEORGE
分类号 G06F9/455;G06F9/46 主分类号 G06F9/455
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