Semiconductor memory device with power decoupling capacitors and method of fabrication

摘要

Provided is a semiconductor memory device including a capacitor structure extending over core and peripheral areas of a substrate. Respective portions of the capacitor structure function as memory cell capacitors in the core area and as first and second capacitors in the peripheral area. A combination of the first and second capacitors functions as a first power decoupling capacitor, and a transistor disposed in the peripheral area functions as a second power decoupling capacitor.