| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a serial-parallel conversion circuit that reduces a dynamic power consumption of clocks and a dynamic power consumption of data. <P>SOLUTION: A serial-parallel conversion circuit 1 includes: a plurality of data fixing circuits 13 operable in either operation mode of a data output mode for outputting input serial data and a data fixing mode for outputting a constant value of fixed data; and a plurality of flip-flops 11 for receiving the serial data and fixed data output from the plurality of data fixing circuits 13, and storing by bit data and outputting as parallel data the serial data output from the plurality of data fixing circuits 13 according to multiple clocks. <P>COPYRIGHT: (C)2013,JPO&INPIT |
