| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a multiplexer, a demultiplexer, a lookup table, and an integrated circuit that maintain a smaller difference in propagation delay time between leading and trailing edges of an input signal than before even when a body bias of a P type MOS transistor of a CMOS inverter is changed. <P>SOLUTION: In the multiplexer, demultiplexer, lookup table, and integrated circuit using a basic configuration that is a selector circuit in which a low threshold CMOS inverter INV1 is connected as an initial stage output buffer to outputs of pass gates M1, M2, the pass gates have body terminals connected to a variable potential body bias power supply VBN, and as for INV1, a P type MOS transistor M3 has a body terminal connected to a variable potential body bias power supply VBP such that a threshold voltage thereof is variable, and an N type MOS transistor M4 has a body terminal connected to a fixed potential power supply VSS such that a threshold voltage thereof is fixed. <P>COPYRIGHT: (C)2013,JPO&INPIT |
