发明名称 DELAY CIRCUIT AND SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To provide a delay circuit that implements high precision by keeping a constant increase and decrease in delay time when changing the number of delay stages. <P>SOLUTION: The delay circuit includes a plurality of delay stages connected in series, a detection circuit and an adjustment circuit. Each delay stage includes a first delay element for inverting a signal from the preceding stage before transfer to the following stage, and a second delay element for inverting a signal from the following stage before transfer to the preceding stage or inverting a delayed signal, which is the inversion of the signal from the preceding stage, before transfer to the preceding stage. The detection circuit detects propagation delay times in respective odd-numbered and even-numbered delay stages from the signal reception from the preceding stage to the signal output from the second delay element through the delayed signal. The adjustment circuit establishes a constant propagation delay time in the odd-numbered and even-numbered delay stages on the basis of the detection results of the detection circuit. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013005177(A) 申请公布日期 2013.01.07
申请号 JP20110133474 申请日期 2011.06.15
申请人 FUJITSU LTD 发明人 SUZUKI KOSUKE;YAMAGUCHI HISAKATSU
分类号 H03K5/13;H03K5/131;H03K5/135 主分类号 H03K5/13
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