DIE STACK PACKAGE, CONTROLLER CHIP EMBEDDED PCB AND METHOD FOR FABRICATING THE SAME

摘要

PURPOSE: A die stack package and a manufacturing method thereof are provided to improve a yield rate of a semiconductor element package by efficiently suppressing a defective package such as a short circuit between wires. CONSTITUTION: A control chip(50) is embedded in a first insulation layer. A second insulation layer and a first circuit layer are arranged on the bottom of the first insulation layer. A third insulation layer and a second circuit layer are arranged on the first insulation layer to embed the control chip in the third insulation layer. A first via hole, exposing the control chip through the second circuit chip and the third insulation layer, is formed. A plating layer filling the first via hole is formed on the second circuit layer. A first via connected with the control chip and a first external circuit pattern connected with the first via are formed.