| 摘要 |
PURPOSE: A semiconductor memory device, a bit line equalizing circuit, and a manufacturing method thereof are provided to match the capacitance of a bit line pair without a net-die loss by asymmetrically designing the resistance of a precharge device. CONSTITUTION: A first bit line sense amplifier part is serially connected between a first bit line(BLB) and a second bit line(BL) and includes a first bit line sense amplifier which includes a pair of precharge devices with an asymmetric contact resistance ratio. The precharge devices include a first precharge device(T_PCG11) and a second precharge device(T_PCG12). The first precharge device is connected between the first bit line and a first precharge voltage supply line. The second precharge device is connected between a second precharge voltage supply line and the second bit line.
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