发明名称 |
SMART BRIDGE FOR MEMORY CORE |
摘要 |
An apparatus includes a first semiconductor device including a memory core. The apparatus also includes a second semiconductor device including periphery circuitry associated with the memory core. The second semiconductor device includes a second serializer/deserializer communication interface coupled to a first serializer/deserializer communication interface of a memory controller. |
申请公布号 |
US2013007350(A1) |
申请公布日期 |
2013.01.03 |
申请号 |
US201113247592 |
申请日期 |
2011.09.28 |
申请人 |
SANDISK TECHNOLOGIES INC.;D'ABREU MANUEL ANTONIO;SKALA STEPHEN;PANTELAKIS DIMITRIS;NAIR RADHAKRISHNAN;PANCHOLI DEEPAK |
发明人 |
D'ABREU MANUEL ANTONIO;SKALA STEPHEN;PANTELAKIS DIMITRIS;NAIR RADHAKRISHNAN;PANCHOLI DEEPAK |
分类号 |
G06F12/00 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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