发明名称 SEMICONDUCTOR MEMORY DEVICE CAPABLE OF REDUCING CHIP SIZE
摘要 According to one embodiment, a first well of the first conductivity type which is formed in a substrate. a second well of a second conductivity type which is formed in the first well. The plurality of memory cells, the plurality of first bit line select transistors, and the plurality of second bit line select transistors are formed in the second well, and the plurality of first bit line select transistors and the plurality of second bit line select transistors are arranged on a side of the sense amplifier with respect to the plurality of memory cells of the plurality of bit lines.
申请公布号 US2013003461(A1) 申请公布日期 2013.01.03
申请号 US201213608713 申请日期 2012.09.10
申请人 ISOBE KATSUAKI;SHIBATA NOBORU;HISADA TOSHIKI 发明人 ISOBE KATSUAKI;SHIBATA NOBORU;HISADA TOSHIKI
分类号 G11C16/14;G11C16/04 主分类号 G11C16/14
代理机构 代理人
主权项
地址