发明名称 FAULT MODE CIRCUITS
摘要 A test circuit and method for testing through-silicon-vias (TSVs) in three-dimensional integrated circuits (ICs) during each phase of manufacturing is disclosed. In one aspect, the method includes testing for faults in each individual TSV, TSV-under-test, shorts between a TSV-under-test, and TSVs in close proximity and for connections between the TSV-under-test and another tier in the ICs. A test circuit has three switchable current paths connected to a power supply via a pull-up resistor and switches: a calibration path, a short path, and a current measurement path. A power supply is connected to the measurement path, and the calibration path and the short path are connected to ground via respective pull-down resistors. For each TSV-under-test, the desired operation mode is selected by the closure of different combinations of switches. The current flowing through the pull-up resistor in each operation mode indicates whether the TSV-under-test has passed or failed the test.
申请公布号 US2013002272(A1) 申请公布日期 2013.01.03
申请号 US201113174617 申请日期 2011.06.30
申请人 IMEC;BADAROGLU MUSTAFA;MARINISSEN ERIK JAN;MARCHAL PAUL 发明人 BADAROGLU MUSTAFA;MARINISSEN ERIK JAN;MARCHAL PAUL
分类号 G01R31/02 主分类号 G01R31/02
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