发明名称 MAXIMIZING PARALLEL PROCESSING IN GRAPHICS PROCESSORS
摘要 Methods and systems may include a computing system having a graphics processor with a three-dimensional (3D) pipeline, one or more processing units, and compute kernel logic to process two-dimensional (2D) command. A graphics processing unit (GPU) scheduler may dispatch the 2D command directly to the one or more processing units. In one example, the 2D command includes at least one of a render target clear command, a depth-stencil clear command, a resource resolving command and a resource copy command.
申请公布号 WO2013003645(A2) 申请公布日期 2013.01.03
申请号 WO2012US44737 申请日期 2012.06.28
申请人 INTEL CORPORATION;PANNEER, SELVAKUMAR;MARSHALL, CARL S. 发明人 PANNEER, SELVAKUMAR;MARSHALL, CARL S.
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