| 摘要 |
<p>Disclosed is a method for integrating a substitute gate of a semiconductor device, which comprises: providing a semiconductor substrate; forming a well region on the semiconductor substrate, and defining an N-type device region and/or a P-type device region; forming a sacrifice gate stack in the N-type device region and/or the P-type device region respectively, the sacrifice gate stack comprising a sacrifice gate dielectric layer and a sacrifice gate electrode layer, the sacrifice gate dielectric layer being located on the semiconductor substrate, and the sacrifice gate electrode layer being located on the sacrifice gate dielectric layer; forming a side wall surrounding the sacrifice gate stack; forming a source/drain region which is located on two sides of the sacrifice gate stack and embedded in the semiconductor substrate; forming a SiO2 layer on the semiconductor substrate; spin coating SOG on the SiO2 layer; etching the SOG to expose the SiO2 layer; performing rate difference etching on the SOG and the SiO2 layer, to obtain a flat surface of the SiO2 layer; and subsequently, forming an N-type substitute gate stack in the N-type device region and/or forming a P-type substitute gate stack in the P-type device region.</p> |
