| 摘要 |
An insulated gate field-effect transistor of a semiconductor device, said transistor having a channel region (CH) with a small width (channel length), is disclosed. Specifically, the width (L) of a portion of the channel region planarly overlapped with the gate electrode (G) is larger than or equal to 1/5 times the thickness (t) of the gate electrode and smaller than or equal to said thickness. Thus, variations in the threshold voltage can be reduced. Furthermore, a body region (BD) of the transistor has a lower portion projecting toward a drain region (DR) more than an upper portion of said body region.
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