| 摘要 |
A method of manufacturing a transistor comprising: providing a substrate 1, a layer of semiconductive material 5 supported by the substrate 1, and a layer of electrically conductive material 2 supported by the layer of semiconductive material 5; forming at least one layer of resist material 3 over said layers; forming a depression 4 in a surface of the covering of resist material 3, said depression 4 extending over a first portion 21 of said conductive layer 2, said first portion 21 separating a second portion 22 of the conductive layer 2 from a third portion 23; removing resist material located under said depression 4 so as to form a window 9 exposing said first portion 21 of the electrically conductive layer 2; removing said first portion 21 to expose a connecting portion 51 of the semiconductive layer 5, said connecting portion 51 connecting the second portion 22 to the third portion 33 of the conductive layer 2; forming a layer of dielectric material 61,62 over the exposed portion 51 of the semiconductive layer 5; and depositing electrically conductive material to form a layer of electrically conductive material 71,72 over said layer of dielectric material 61,62; the layer of dielectric material 61 electrically isolating the layer of electrically conductive material 71 from the second 22 and third 23 portions of the conductive region, such that the second 22 and third 23 portions act as source and drain electrodes and the conductive material 71 acts as a gate electrode. Also disclosed is the transistor formed from this method. |
