发明名称 Delay circuit and method for delaying signal
摘要 A delay circuit includes: a delay unit configured to receive a clock signal, delay an input signal sequentially by a predetermined time interval, and output a plurality of first delayed signals; and an option unit configured to select one of the plurality of first delayed signals based on one or more select signals, and output a second delayed signal.
申请公布号 US8344783(B2) 申请公布日期 2013.01.01
申请号 US20100970623 申请日期 2010.12.16
申请人 SK HYNIX INC.;KO JAE BUM;LEE JONG CHERN;BYEON SANG JIN 发明人 KO JAE BUM;LEE JONG CHERN;BYEON SANG JIN
分类号 H03H11/26 主分类号 H03H11/26
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