发明名称 Memory cell write
摘要 Embodiments of a memory cell comprising a voltage module configured to supply a first supply voltage and a second supply voltage, a data node programming module configured to receive the first supply voltage and to program a data node based at least in part on a write data line, and a complementary data node programming module configured to receive the second supply voltage and to program a complementary data node based at least in part on a complementary write data line, wherein the voltage module is configured such that the first supply voltage is substantially different from the second supply voltage for a period of time while the memory device is being programmed. Additional variants and embodiments may also be disclosed and claimed.
申请公布号 US8345491(B2) 申请公布日期 2013.01.01
申请号 US201113282331 申请日期 2011.10.26
申请人 INTEL CORPORATION;DAMARAJU SATISH K.;AHMED AK R.;SIERS SCOTT E. 发明人 DAMARAJU SATISH K.;AHMED AK R.;SIERS SCOTT E.
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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