PHASE-LOCKED LOOP LOCK DETECT

摘要

Apparatus and methods for detecting a lock in a phase-locked loop (PLL) are disclosed. In one aspect, a lock detect component includes a reference multiplier and a lock detect circuit. The reference multiplier can receive a reference signal, a divider signal from the PLL, and an oscillator output. The reference multiplier can also generate a multiplied reference signal based on the reference signal and the oscillator output. The multiplied reference signal can have a frequency that is an integer multiple of a frequency of the reference signal. The lock detect circuit can detect a phase lock of the reference signal and the divider signal based at least in part on comparing a signal generated from a delayed reference signal and a signal generated from a delayed divider signal for a predetermined period of time.