发明名称 Increased depth of drain and source regions in complementary transistors by forming a deep drain and source region prior to a cavity etch
摘要 Deep drain and source regions of an N-channel transistor may be formed through corresponding cavities, which may be formed together with cavities of a P-channel transistor, wherein the lateral offsets of the cavities may be adjusted on the basis of an appropriate reverse spacer regime. Consequently, the dopant species in the N-channel transistor extends down to a specific depth, for instance down to the buried insulating layer of an SOI device, while at the same time providing an efficient strain-inducing mechanism for the P-channel transistor with a highly efficient overall manufacturing process flow.
申请公布号 US8338894(B2) 申请公布日期 2012.12.25
申请号 US20100693692 申请日期 2010.01.26
申请人 GRIEBENOW UWE;HOENTSCHEL JAN;BEYER SVEN;ADVANCED MICRO DEVICES, INC. 发明人 GRIEBENOW UWE;HOENTSCHEL JAN;BEYER SVEN
分类号 H01L27/092;H01L21/8238 主分类号 H01L27/092
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