发明名称 Semiconductor memory device comprising variable delay unit
摘要 A semiconductor memory device comprises a variable delay unit and a data trainer. The variable delay unit is configured to generate a write data signal by delaying a write data driving signal by different amounts of time depending on whether the semiconductor memory device is in a data training mode or a normal operating mode, and further configured to generate a read data driving signal by delaying a read data signal by different amounts of time in the data training mode and the normal operating mode. The data trainer is configured to be activated in the data training mode, and while activated, receive the write data signal, compare the write data signal with a predetermined write pattern, perform a data training mode operation, and output the read data signal with a predetermined read pattern.
申请公布号 US8339877(B2) 申请公布日期 2012.12.25
申请号 US20100764460 申请日期 2010.04.21
申请人 KWAK SANG-HYUP;BAE SEUNG-JUN;KIM YOUNG-SIK;SAMSUNG ELECTRONICS CO., LTD. 发明人 KWAK SANG-HYUP;BAE SEUNG-JUN;KIM YOUNG-SIK
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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