| 摘要 |
A data transmission apparatus may include a delay locked loop for generating multi-phase clock signals synchronized to an input clock signal. A clock selector may select the multi-phase clock signals in response to a selection signal. A modulation controller may generate the selection signal using the input clock signal and modulation information, so that the clock selector selects the multi-phase clock signals within every predetermined interval. A clock generator may generate first and second latch clock signals according to the selected multi-phase clock signals. A data transmitter may transmit input data using the first and second latch clock signals. Therefore, the data transmission apparatus mitigates at least as much EMI as a related data transmission apparatus using spread spectrum clock generation for EMI mitigation, eliminates the probability of data error, and saves an IC area. It obviates the need for a FIFO memory, thus contributing miniaturization of the IC. The spread spectrum clock generation function of the related data transmission apparatus may be implemented inside the IC, thus increasing throughput. |
