发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR ERASING DATA THEREOF
摘要 A control circuit is configured to set a drain-side select transistor and a source-side select transistor connected to a selected memory string to non-conductive states. The control circuit is configured to apply a first voltage to a non-selected word line connected to a gate of a non-selected memory cell in the selected memory string. The control circuit is configured to apply a second voltage to a selected word line connected to a gate of a selected memory cell in the selected memory string. The second voltage is smaller than the first voltage in an erasing operation.
申请公布号 US2012320698(A1) 申请公布日期 2012.12.20
申请号 US201213493370 申请日期 2012.06.11
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 ITAGAKI KIYOTARO;YAMADA KUNIHIRO;IWATA YOSHIHISA
分类号 G11C7/00 主分类号 G11C7/00
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