发明名称 |
METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE HAVING LOW ELECTRICAL LOSSES, AND CORRESPONDING STRUCTURE |
摘要 |
A manufacturing process for a semiconductor-on-insulator structure having reduced electrical losses and which includes a support substrate made of silicon, an oxide layer and a thin layer of semiconductor material, and a polycrystalline silicon layer interleaved between the support substrate and the oxide layer. The process includes a treatment capable of conferring high resistivity to the support substrate prior to formation of the polycrystalline silicon layer, and then conducting at least one long thermal stabilization on the structure at a temperature not exceeding 950° C. for at least 10 minutes.
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申请公布号 |
US2012319121(A1) |
申请公布日期 |
2012.12.20 |
申请号 |
US201213487066 |
申请日期 |
2012.06.01 |
申请人 |
REYNAUD PATRICK;KERDILES SEBASTIEN;DELPRAT DANIEL;SOITEC |
发明人 |
REYNAUD PATRICK;KERDILES SEBASTIEN;DELPRAT DANIEL |
分类号 |
H01L29/38;H01L21/263;H01L21/265 |
主分类号 |
H01L29/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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