发明名称 |
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE |
摘要 |
<p>Provided is a method for manufacturing a semiconductor device which comprises a MOS transistor that is reduced in variation in the characteristics due to channeling and that is also reduced in asymmetry due to shadowing. This method for manufacturing a semiconductor device that comprises a plurality of transistors on a wafer (302), which has a notch (301), in directions that are parallel or perpendicular to the notch direction that connects the center of the wafer (302) and the notch (301) comprises: a step of preparing the wafer (302) that has a main surface having an off angle of 2-2.8° (inclusive) from the (100) plane in a direction that has a twist angle of 12.5-32.5° (inclusive) with respect to the notch direction; and a step of implanting an impurity in a direction that is perpendicular to the main surface of the wafer (302).</p> |
申请公布号 |
WO2012172774(A1) |
申请公布日期 |
2012.12.20 |
申请号 |
WO2012JP03792 |
申请日期 |
2012.06.11 |
申请人 |
PANASONIC CORPORATION;YONEDA, KENJI |
发明人 |
YONEDA, KENJI |
分类号 |
H01L21/265;H01L21/336;H01L29/78;H01L29/786 |
主分类号 |
H01L21/265 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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