Method for performing incremental delta-sigma analog-to-digital conversion in digital transducer, involves performing adjustment of conversion period based on determined optimum output value

摘要

#CMT# #/CMT# A quantization error signal (6) is output from integration stages (2) to an analog voltage detection and comparison unit (7) that determines optimum output value of incremental change in the delta-sigma analog-to-digital conversion using quantization error signal. The adjustment of the conversion period or adjustment of the necessary conversion loop is performed based on the optimum output value of incremental change in the delta-sigma analog-to-digital conversion. #CMT# : #/CMT# An independent claim is included for arrangement for performing incremental delta-sigma analog-to-digital conversion in digital transducer. #CMT#USE : #/CMT# Method for performing incremental delta-sigma analog-to-digital conversion in digital transducer. #CMT#ADVANTAGE : #/CMT# The increase in the accuracy of the conversion is achieved, as adjustment of the conversion period or adjustment of the necessary conversion loop is performed based on the optimum output value of incremental change in the delta-sigma analog-to-digital conversion. The number of loop iterations required to conversion can be reduced, so that reduction in the conversion of analog input value in the incremental time sigma-delta analog-digital converter is possible. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# The drawing shows the block diagram of the arrangement for performing incremental delta-sigma analog-to-digital conversion in digital transducer. (Drawing includes non-English language text) 2 : Integration stage 3 : Analog-to-digital converter 6 : Quantization error signal 7 : Analog voltage detection and comparison unit 8 : Digital control logic.